Master Course Description for

No: EE 271

Title: DIGITAL CIRCUITS AND SYSTEMS

Credits: 5 (4 lecture - 1 lab)

UW Course Catalog Description

Coordinator: James K. Peckol, Senior Lecturer, Electrical Engineering

Goals: To provide a fundamental understanding of digital hardware systems and their design.

Learning Objectives:

At the end of the course, the student should be able to:

  1. Design and implement digital circuits and systems in the laboratory using fundamental concepts.
  2. Write Boolean equations for basic combinational logic circuits, use Boolean algebra to simplify such equations, then implement the resulting designs in the laboratory. 
  3. Design and Implement combinational circuits of medium complexity in the laboratory using SSI and MSI combinational logic elements.
  4. Design and implement basic sequential circuitry and finite state machines in the laboratory.
  5. Identify real world timing problems in both combinational and sequential circuits and design basic digital systems that are tolerant of such effects.
  6. Design and Implement combinational and sequential circuits using elementary (registered) programmable logic devices.
  7. Develop basic structural  models of digital systems using the Verilog hardware design language.

Textbook: Fundamentals of Digital Logic with VERILOG DESIGN, Brown, Stephen and Vranesic, Zvonko., McGraw-Hill, 2003.

Reference Materials: Documents for Verilog, TTL/CMOS, Gate Array logic chips

Prerequisites: CS 142

Topics:

  1. Number systems: positional number system, negative number representation, alphanumeric codes.
  2. Boolean algebra: logic gates, basic theorems of Boolean algebra, minimization by formulas, minimization by Karnaugh maps, incompletely specified functions.
  3. Combinational circuit design; integrated circuit characteristics, SSI and MSI circuit design of combinational circuits, encoders, decoders, data converters, multiplexers, arithmetic operations.
  4. Sequential logic design using D FFs and latches.  Designs include shift registers, counters, and sequential circuits (the design process includes the development and use of state diagrams, state table, state assignment and circuit synthesis).
  5. Programmable logic devices: Programmable Array Logic (PAL), Programmable Logic Array (PLA), applications of programmable logic devices.

Course Structure: The course meets for 4 hours of lecture and 3 hours of laboratory.

Computer Resources: This class is supported by a laboratory which has 25 Intel PC's for development. There will be extensive computer usage in the homework and laboratories for design and simulation with Verilog hardware description language and programmable logic device software packages.

Laboratory: There are four laboratories: Introduction to Verilog, Combinational Circuit Design, Sequential Circuit Design, and Simple System Design. For each laboratory, the students have to design the circuit, construct it and demonstrate it to the instructor and/or teaching assistant in a 2-3 week time period. In all four laboratories, the students use SSI, MSI, and programmable logic devices for implementation. All laboratories are done in an open lab as three person teams.

Grading:  The grade is based upon weekly homework assignments, the laboratory projects, midterm exams, and a comprehensive final examination.

Outcome Coverage:
 

(a) An ability to apply knowledge of mathematics, science, and engineering. These are done as an integral and routine part of the material taught. Theory is always presented in the context of its application to real world problems and its limitations under real world constraints. (M)

(b) An ability to design and conduct experiments, as well as to analyze and interpret data. Silicon processing procedures are strongly interactive and affect each other. Thus, simulation of process sequences is an essential part of the art to be learned. These simulations take the place of "experiments" in the laboratory. Several homework assignments test the ability of the student to design, analyze and interpret the results of processing "experiments" to elucidate the complex interactions between processes. (H)

(c) An ability to design a system, component or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability and sustainability. Each of the 4 laboratories assigns a particular design problem to be solved. (H)

(d) An ability to function on multidisciplinary teams. (N/A)

(e) An ability to identify, formulate and solve engineering problems. This is a standard part of the homeworks, exams, and laboratories. (M)

(f) An understanding of professional and ethical responsibilities. This is a standard part of the lectures (L)

(g) An ability to communicate effectively. Laboratories will require write-ups and exams require written analysis of real-world engineering situations. (M)

(h) The broad education necessary to understand the impact of engineering solutions in a global, economic, environmental and societal context. Semiconductor chips have become pervasive in almost every product we buy, ranging from talking infant's toys to automatic toothbrushes. In reviewing the societal impact of the increased complexity and lower cost of modern silicon integrated circuits, we also discuss the potential for future improvements, and consider the changes that may result from them. (L)

(i) A recognition of the need for, and an ability to engage in life-long learning. The course emphasizes the rapid change in technologies employed in the  design of digital systems. (L)

(j) Knowledge of contemporary issues. Contemporary issues discussed include the impending changing technologies. (L)

(k) An ability to use the techniques, skills and modern engineering tools necessary for engineering practice. Students will use modern computers, modeling and simulation tools. (M)

(l) Knowledge of probability and statistics, including applications appropriate to electrical engineering. (N/A)

(m) Knowledge of differential equations, linear algebra, complex variables and discrete mathematics. (N/A)

 

Prepared By: James K. Peckol & Scott Hauck
Last Revised: 04/23/2007