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Brian Otis

Brian Otis
Assistant Professor
RF/Analog IC Design
M430 EE/CSE
Box 352500
University of Washington
Seattle, WA 98195
Research website

Phone: (206)616-5998
E-mail:

University of California Berkeley, 2005 Ph.D.
University of California, Berkeley, 2002 M.S.
University of Washington, Seattle, 1999 B.S.


[Biosketch] [Research Interests] [Teaching] [Selected Publications] [Patents] [Honors]


Biosketch

Brian P. Otis joined the University of Washington Department of Electrical Engineering faculty in 2005. His M.S. and Ph.D. were completed at U.C. Berkeley at the Berkeley Wireless Research Center with Prof. Jan Rabaey. He has worked previously at the University of Washington Kelly Tremblay Brain and Behavior Laboratory, the U.C. Berkeley Ralph Freeman Neuroscience Lab, Intel Corporation, and Agilent Laboratories.

Research Interests

1. Ultra-low power, miniaturized RF integrated circuits and systems

2. Minimal energy operation of analog and digital electronics for pervasive computing and communication

3. MEMS/IC interfaces

4. Circuits and systems for bioelectrical interfaces

Please visit the Wireless Sensing Group website to learn more.

Teaching

Fall 2008: Linear Analog Integrated Circuit Design (ee473)

Spring 2008: Devices and Circuits II (ee332)

Fall 2007: Linear Analog Integrated Circuit Design (ee473)

Spring 2007: Radio Frequency Integrated Circuit Design & Analysis (ee538)

Winter 2007: Topics in Low Power Microsystems (ee500)

Fall 2006: Linear Analog Integrated Circuit Design (ee473)

Spring 2006: Radio Frequency Integrated Circuit Design & Analysis (ee538)

Fall 2005: Linear Analog Integrated Circuit Design (ee473)

Interested in undergraduate independent study?

Five Recent Publications

(Click here for complete list)
  1. B. Otis and J. Rabaey, "Ultra-low Power Wireless Technologies for Sensor Networks", Springer-Verlag, 2007.
  2. Jeremy Holleman, Apurva Mishra, Chris Diorio, and Brian Otis, "A Micro-Power Neural Spike Detector and Feature Extractor in .13um CMOS," IEEE Custom Integrated Circuits Conference (CICC), September 2008.
  3. J. Hu and B. Otis, "A 3uW, 400 MHz Divide-by-5 Injection-Locked Frequency Divider with 56% Lock Range in 90nm CMOS," IEEE Radio Frequency Integrated Circuit (RFIC) Symposium, June 2008.
  4. Shailesh Rai, Brian Otis, "A 600 mW BAW-Tuned Quadrature VCO Using Source Degenerated Coupling", IEEE Journal of Solid State Circuits, Vol 43, No. 1, pp.300-305, January 2008.
  5. Ying Su, Jeremy Holleman, Brian Otis, "A Digital 1.6 pJ/bit Chip Identification Circuit Using Process Variations", IEEE Journal of Solid State Circuits, Vol 43, No. 1, pp. 69-77, January 2008.

Patents

  1. Pending: "Frequency-Selective Transformer and Mixer Incorporating Same", U.S. Publication No. US2007-0205849A1. Inventor: Brian Otis, Agilent Technologies.
  2. Pending: "Auto-Tuning Amplifier", U.S. Serial No. 12/020,805. Inventors: Steven Zafonte and Brian Otis, University of Washington.

Honors

2008 University of Washington Electrical Engineering Outstanding Teaching Award
2008 Nominated for the University of Washington College of Engineering Faculty Innovator for Research Award
2007 University of Washington Electrical Engineering Outstanding Research Advisor Award
2006 Nominated for the University of Washington College of Engineering Outstanding Teaching Award
2004 Berkeley Sensor and Actuator Center Industrial Advisory Board Best Paper Award
2004 Analog Devices Outstanding Designer Fellowship
2003 U.C. Berkeley EECS Dept. Seven Rosen Funds Departmental Award for Innovation
2003 ISLPED Student Design Contest Competition Award
2002 ISSCC Jack Raper Outstanding Paper Award