C-to-FPGA for Tomographic Reconstruction
Nikhil Subramanian*, Jimmy Xu*, Adam Alessio**, Scott Hauck*
**Imaging
Research Lab (IRL), Radiology, University of Washington; *Adaptive Computing
Machines and Emulators (ACME) Lab, Electrical Engineering, University of
Washington
Tomographic
reconstruction is the process of creating cross-sectional images from emission
or transmission data acquired by a scanner. Apart from medical imaging
applications in X-Ray CT and PET, these principles apply to a variety of other
domains ranging from synthetic aperture radar (SAR) to electron microscopy. As
a result, there has been considerable interest in evolving efficient and
accelerated techniques to perform the reconstruction.
In
tomographic systems, the primary computational demand after data capture by the
scanner is the backprojection of the acquired data into image space to
reconstruct the internal structure of the scanned object (Figure 1 middle).
Back-projection can be viewed as a mapping of raw data space into the
image space. In a typical parallel-beam
CT system, the data has ~106 entries for each cross-section and the
image has ~2x105 entries. The
process of tracing each datum through the image space is demanding. The key to
accelerating the process is exploiting parallelism in the computation which is
often accomplished by implementing the algorithm in reconfigurable computing
platforms.
Figure 1. Simplified Tomography flow. Scanning (left) produces a set of aggregate data on probe lines. Through back-projection (center) multiple samples are brought together to reconstruct the internal structure of the patient (right).
In this project we developed
an FPGA accelerator to speedup backprojection. We created the FPGA design using
a C-to-FPGA tool flow called Impulse C with a view to compare the performance
of this high level tool flow with that of traditional based design flows. For
information about the implemented C-to-FPGA and HDL design please see the
publications section below. For the Impulse-C source-code and design please see
the design files section.
Student Theses
N. Subramanian, A C-to-FPGA
Solution for Accelerating Tomographic Reconstruction, M.S. Thesis,
University of Washington, Dept. of EE, 2009
Click Here to download the Impulse C design
files. This design performs the back projection of a 512x512 image from 1024
projections having 1024 detector channels each.