Jacques Christophe Rudell
Phone: (206) 685-1600
E-mail: jcrudell (at) ee (dot) washington (dot) edu
University of California, Berkeley, PhD (Electrical Engineering)
University of California, Berkeley, MS (Electrical Engineering)
University of Michigan, Ann Arbor, BS (Electrical Engineering)
Dr. Jacques Rudell joined the EE department as an Assistant Professor, in January 2009. He received a B.S. degree in electrical engineering from the University of Michigan, Ann Arbor and an MSEE and PhD, from UC Berkeley. From 1989 to 1991, he was an IC Designer and Project Manager with Delco Electronics (now Delphi), where he focused on bipolar analog circuits for automotive applications. From 2000 to 2001, he was a postdoctoral Researcher at the University of California at Berkeley, in addition to holding consulting positions in several Silicon Valley firms. In early 2002, he joined Berkana Wireless (now Qualcomm), San Jose, CA as an Analog/RF IC Design Engineer and later became the Design Manager of the Advanced IC Development Group. From 2005 to 2008, Dr. Rudell worked in the Advanced Radio Technology Group, at Intel, where his work focused mainly on RF transceiver circuits and systems, in advanced silicon processes.
In 1999, Dr. Rudell was the recipient of the Demetri Angelakos Memorial Achievement Award given by the EECS department at UC Berkeley. He received the 1998 ISSCC Jack Kilby Best Student Paper Award and was the co-recipient of the 2001 ISSCC Lewis Best Paper Award. He also received the 2008 ISSCC award for best evening session. In addition, Dr. Rudell is on the technical program committee for the International Solid-State Circuits Conference (ISSCC), serves on the MTT-IMS Radio Frequency Integrated Circuits (RFIC) Symposium steering committee, and he currently serves as an Associate Editor for the Journal of Solid-State Circuits.
My group's research focus will cover a broad range of topics related to analog, mixed-signal, RF and mm-wave circuits. The emphasis of our work will focus on novel architectures and circuits which overcome the challenges presented by future low-cost, silicon technologies, such as ultra-low voltage, low-intrinsic device gain, and poor matching characteristic, to name a few. Some of my past work has been on integrated circuits for wireless communication systems requiring aggressive performance. A major emphasis of our future research will explore architectures and circuits for highly integrated, concurrently operating, heterogeneous-wireless systems which overcome the evolving challenges associated with co-existence. Other areas of research which I have an interest are mm-wave circuits for 60GHz and imaging applications, low-voltage highly-efficient transmitter systems, ultra-low power RF for cellular based sensor networks, high-speed I/O for chip-to-chip and core-to-memory applications and finally, integrated circuits for bio-medical applications.
- Best Evening Session Award, International Solid-State Circuits Conference, 2008
- Lewis Winner Award for Outstanding Paper (Co-Recipient), International Solid-State Circuits Conference, 2002
- The Demetri Angelakos Memorial Achievement Award, UC Berkeley EECS Department, 1999
- The Jack Kilby Award for Outstanding Student Paper, International Solid-State Circuits Conference, 1998
1. Co-existence of heterogeneous programmable systems (Co-existences of highly programmable, heterogeneous wireless systems on the same platform or silicon)
2. Low-voltage Analog and Mixed-Signal circuits (Circuits implemented in modern nanometer length processes. This work will focus on circuits which allow for inherently low-gain, low-voltage technologies.)
3. Low Power RF for Cellular Systems (Ultra-low power circuits for cellular based systems)
4. mm-Wave Circuits & Systems (mm-Wave CMOS circuits for communication and imaging)
5. High-Speed I/O (High-speed electrical chip-to-chip, core-to-core, and core-to-memory interfaces in CMOS processes)
Future Analog Systems Technologies (FAST) Lab: http://www.ee.washington.edu/research/fast/FAST.html
J.A. Weldon, J.C. Rudell, L. Lin, R.S. Narayanaswami, M. Otsuka, S. Dedieu, L. Tee, K.C. Tsai, C. W. Lee, and P.R. Gray, “A 1.75-GHz Highly-Integrated Narrow-Band CMOS Transmitter with Harmonic-Rejection Mixers”, in IEEE Journal of Solid-State Circuits, vol. 26, pp. 2003-2015, Dec. 2001.
J.C. Rudell, J.J. Ou, G. Chien, T.B. Cho, F. Brianti, J.A. Weldon, and P.R. Gray, “A 1.9-GHz Wide-Band IF Double Conversion CMOS Receiver for Cordless Telephone Applications”, in IEEE Journal of Solid State Circuits, vol. 32, pp. 2071-2088, Dec. 1997.
JC.S.H. Wong, J.C. Rudell, G.T. Uehara, and Paul R. Gray, “A 50 MHz Eight-Tap Adaptive Equalizer for Partial-Response Channels”, IEEE Journal of Solid State Circuits, vol. 32, pp. 228-234, March 1995.
. Vassiliou, K. Vavelidis, T. Georgantas, S. Plevridis, N. Haralabidis, G. Kamoulakos, C. Kapnistis, S. Kavadias, Y. Kokolakis, P. Merakos, J. C. Rudell, A. Yamanaka, S. Bouras, and I. Bouras, “A Single-Chip, Digitally Calibrated 5.15-5.825 GHz 0.18μm CMOS Transceiver for 802.11a Wireless LAN”, IEEE Journal of Solid State Circuits, vol. 38, pp. 2221-2231
Selected Conference Papers
J. C. Rudell, P. Goyal, C.D. Hull and A. Kidwai, “A 1.1V 5-to-6 GHz Reduced-Component Direct-Conversion Transmit Signal Path in 45nm CMOS”, International Solid-State Circuit Conference Digest of Technical Papers, pp 418-419. Feb. 2009
J. C. Rudell, O.E. Erdogan, D.G. Yee, R. Brockenbrough, C.S.G. Conroy, and B. Kim, “A 5th-Order Continuous-Time Harmonic-Rejection GmC Filter with In Situ Calibration for use in Transmitter Applications”, International Solid-State Circuits Conference Digest of Technical Papers, 2005, pp.322-323.
O.E. Erdogan, R. Gupta, D.G. Yee, J.C. Rudell, J.S. Ko, R. Brockenbrough, S.O. Lee, E. Lei, J.L. Tham, H. Wu, C.S.G. Conroy and B. Kim, “A Single Chip Quad-Band GSM/GPRS Transceiver in 0.18μm Standard CMOS”, Digest of Technical Papers, IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2005, pp. 318-319.
I.Bouras, S. Bouras, T. Georgantas, N. Haralabidis, G. Kamoulakos, C. Kapnistis, S. Kavadias, Y. Kokolakis, P. Merakos, J. Rudell, S. Plevridis, I. Vassiliou, K. Vavelidis, and A. Yamanaka, “A Digitally Calibrated 5.15-5.825 GHz Transceiver for 802.11a Wireless LANs in 0.18μm CMOS”, Digest of Technical Papers, in IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2003, pp. 352-353.
J.A. Weldon, J.C. Rudell, L. Lin, R.S. Narayanaswami, M. Otsuka, S. Dedieu, L. Tee, K.C. Tsai, C. W. Lee, and P.R. Gray, “A 1.75-GHz Highly-Integrated Narrow-Band CMOS Transmitter with Harmonic-Rejection Mixers”, Digest of Technical Papers, in IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2001, pp. 160-161.
J.C. Rudell, “High-Integration, High-Selectivity CMOS Receivers for Multi-Standard Personal Communication Systems”, Presentation at the Taipei Technology Conference, Taipei Taiwan, October 4th, 2000.
J.C. Rudell, J.J. Ou, S. Narayanaswami, G. Chien, J.A. Weldon, L. Lin, K.C. Tsai, L. Tee, K. Khoo, D. Au, T. Robinson, D. Gerna, M. Otsuka and P.R. Gray, “Recent Developments in High Integration Multi-Standard CMOS Transceivers for Personal Communication Systems”, in International Symposium on Low Power Electronics and Design, Aug. 1998.
J.C. Rudell, J.J. Ou, G. Chien, T.B. Cho, F. Brianti, J.A. Weldon, and P.R. Gray, “A Wide-Band IF Double Conversion CMOS Integrated Receiver for Cordless Telephone Applications”, Digest of Technical Papers, in IEEE International Solid-State Circuits Conference, 1997, pp. 304-305.
F. Brianti, G. Chien, T. Cho, S. Lo, S. Mehta, J. Ou, J. Rudell, T. Weigandt, J. Weldon, and P. Gray, “High Integration CMOS RF Transceivers”, Proceeding of the Workshop on Advances in Analog Circuit Design, Lausanne-Ouchy, Switzerland, April, 1996.
G.T. Uehara, C.S.H. Wong, J.C. Rudell, and P.R. Gray, “A 50MHz 70mW 8-Tap Adaptive Equalizer Viterbi Sequence Detector in 1.2μm”, IEEE Custom Integrated Circuits Conference Proceedings, 1994, pp. 51-54.
Spring 2009 : EE 433 Analog Circuit Design
Fall 2009 : EE 538A Topics in Electronic Circuit Design
Spring 2010 : EE 433 Analog Circuit Design
Work in progress
Recent Graduate Students
Work in progress
Journal of Solid-State Circuits, Associate Editor
International Solid-State Circuits Conference, Technical Program Committee
MTT-IMS RFIC Symposium, Steering Committee Member, Acting Technical Program Committee Co-Chair