802.11b Interference Modeling in NS-3 Simulator Home



Out of all the network layers, the physical layer is the most difficult to fully understand and model. The reason for this is that this layer is the only one not fully defined in software. For example, in a networked system, the physical layer cannot specify its channel between two connected nodes, but must instead predict it. This causes difficulty if the channel is not ideal. In wired systems, the prediction of the channel response is relatively simple. There is rarely interference, and noise rates are minimal. With the introduction of wireless technology however, new problems have surfaced. The wireless channel is volatile, with unpredictable frequency shifts, fading characteristics, and other effects not present in a wired connection. In addition, interference has emerged as an increasingly influential problem. While many channel characteristics, such as gaussian noise, can be predicted due to the probabilistic nature of random variables that are based on these characteristics, interference cannot be modeled in the same way. Also, due to the unique behavior from every type of interference source, it is difficult to fully characterize and model a channel with interference.  

This research intends to improve the NS-3 network simulator interference model by examining different aspects of interference, determining the validity of the current NS-3 implementation, and suggesting alternative implementations that more closely match reality. 



Wireless interference experiments require an extremely fine timing granularity and isolated testbed, two aspects which are very difficult to obtain. To remedy the latter difficulty, the Carnegie Mellon University (CMU) wireless emulator is used, as described below. To solve the timing problems, a five node topography is established, with node sinks that reconstruct the experiment events after each test. For more information, please refer to "An Improved 802.11b Interference Model for Network Simulation." 


Current Research

The CMU wireless emulator is an FPGA based wireless network emulator that allows for the emulation of wireless signals and channels between a series of nodes. Each node is a wireless device that is physically connected to a central FPGA, which then emulates an actual wireless channel between nodes. These nodes each have an Atheros card with Madwifi drivers, and can be set up with completely separate channels between nodes, allowing for, among many other functions, testing of the most common interference scenarios (such as hidden terminal).  

Currently, there is very little work done investigating the effects of interference on packet reception with a sub-packet resolution. The main reason for this is the difficulty of setting up a consistent and reliable channel between nodes. The CMU emulator does not experience this difficulty, however, as the channel can be explicitly set up and altered as necessary. In the emulator, each node pair can be set up with a specific and independent channel from every other node pair. With this, full channel control is made simple.

Using this tool, single source interference 802.11b experiments are performed. These experiments are used to investigate the nature of 802.11b interference, as well as serving as an interference model for network simulators (namely NS-3) in the form of a simple lookup table.

While the CMU emulator data provides an important resource for simulating interference in network models, it does not provide for a more fundamental understanding of the basic causes of interference effects. A Simulink interference model has been built to more fully understand 802.11b interference. Since there are many aspects in a hardware receiver that are difficult to accurately model in software, this model is not used as a standard to judge the exact behaviors of interference. Instead, the Simulink interference model is used to provide insight into the different aspects of interference, and how important each aspect is.

This model is built to match the IEEE 802.11b standard as closely as possible, in order to reduce any source of error within experiment results. With the use of this software model, interference characteristics can be investigated at the bit level, the chip level, or even at the sub-chip level, which is difficult to perform with hardware testing. Interference experiments have been compared with similar experiments through the NS-3 network simulator, and results have been found showing the differences viewed between the two implementations.