MCAST: Model Compiler for Circuit Simulation

PI | Students | Sponsors | Publications

Principal Investigator

Richard Shi

Participating Students:

Bo Hu
Lili Zhou
Bo Wan (Now with Cadence Design Systems)

DARPA EP&I Program (1996-2001)
DARPA NeoCAD Program (2002 to 2004)
NSF CAREER Award
SRC

• B. Wan, B. Hu, L. Zhou and C.-J. R. Shi, ``MCAST: An abstract-syntax-tree based model compiler for circuit simulation", pp. 249-252 in Proc. IEEE Custom Integrated Circuits Conf. (CICC'03), San Jose, CA, Sept. 2003.
• L. Zhou, H. Bo, B. Wan, and C.-J. R. Shi, ``Rapid BSIM model implementation with VHDL-AMS/Verilog-AMS and MCAST compact model compiler", pp. 285-286 in Proc. IEEE Application Scientific Integrated Circuits/Systems-on-Chip Conf. (SOC'03), Portland, Oregon, Sept. 2003.
• B. Wan, E. Acar, S. Nassif, and C.-J. R. Shi, "Design-adaptive device modeling in model compiler for efficient and accurate circuit simulation" pp. 400-405 in Proc. IEEE Behavioral Modeling and Simulation Conf. (BMAS'04), San Jose, CA, Oct. 2004.
• B. Wan, P. V. Nikitin, and C.-J. R. Shi, "Circuit level modeling and simulation of mixed-technology systems", pp. 113-116 in Proc. IEEE Systems-on-Chip Conf (SoC'04)., Santa Clara, CA, Sept. 2004.
• B. Wan and C.-J. R. Shi, "Hierarchical multi-dimensional table lookup for model compiler based circuit simulation," in Proc. Design, Automation and Test in Europe Conf. (DATE'04), Paris, France, March 2004 (also appeared in IEE Proceedings on Computers and Digital Techniques, vol. 152, no. 1, pp. 39-44, Jan. 2005).
• B. Hu, Z. Li, L. Zhou, C.-J. R. Shi, K.-H. Baek, and M.-J. Choe, "Model-compiler based efficient statistical circuit analysis: An industry case study of a 4GHz/6-bit ADC/DAC/DEMUX ASIC", Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS'05), Kobe, Japan, May 2005.