Compact Power Semiconductor Models

Compact Models for Power Semiconductor Devices

Latest update: April 20, 2000

Many power semiconductor device models were developed at the University of Washington through a research program supported by NSF-CDADIC (NSF Center for Design of Analog-Digital Integrated Circuits) during the period from 1990 through1998. MSEE and Ph.D. students under the direction of Professor Peter O. Lauritzen developed most of the models. Almost all of these models are now in the public domain, and they are available for public downloading of model source code and documentation. Several newer and updated models have been added from other universities. NSF-CDADIC provided a small grant in 1999 to support the inital preparation of this Web page.

Three of the models were developed with partial support from Siemens AG (now Infineon) and one with partial support from EPRI (Electric Power Research Institute). Students at the Indian Institute of Technology, Madras, India also developed some models as a result of P. O. Lauritzen's visit there as a Fulbright Senior Lecturer in 1997.

The models are for discrete and integrated circuit power semiconductor devices and related models. The Vertical Power MOSFET model included in the table is the only model that is currently proprietary. This model is available only to CDADIC firms until it becomes public domain in September 2000. Newly added models are labeled in red.

All of the models are currently implemented in Saber MAST HDL (Hardware Description Language) for use on the Saber simulator available from Analogy, Inc. Compiled models are not available. The models can be translated into VHDL-AMS HDL, the new IEEE Standard Analog HDL or other HDLs for use on other simulators. Information on the possibilities for model support or translation into a standard HDL is available.

These models are being made available to the general public without restrictions to promote their widespread use. Published model equations and source code is essential so models can be easily understood and be installed on a variety of different simulators. With source code available, users can also assist in identifying and fixing bugs in the models. Please send information on bugs and bug fixes to Peter O. Lauritzen so that they can be incorporated into the public models.

Table of Available Models and Their Characteristics

Model Type	Performance Rating	Quality Classification	Current Availability
Diode Models
Diode with reverse recovery	Basic	3B	YES
Diode with forward and reverse recovery	Basic	3B	YES
Diode, voltage-dependent reverse recovery	Intermediate	1B	YES
Power diode with forward and reverse recovery	Accurate	2B	YES
Electro-thermal power Diode	Thermal	2B	YES
Avalanche and tunneling breakdown	Accurate	1B	Some additional revisions needed
Power BJT Model
BJT with static and dynamic saturation.	Accurate	1B	YES
Power MOSFET Models
LDMOS for Smart Power IC design	Accurate	2B	YES
Parasitic BJT for LDMOS	Intermediate	1B	YES
VDMOS for discrete power MOSFETs	Accurate	2B	Proprietary to CDADIC firms until September 2000
IGBT Models
Punch-through IGBT	Accurate	1B	Withdrawn; will be soon replaced by a new model
Non-punch-through IGBT	Accurate	1B	Withdrawn due to errors in model
Thyristor Models
SCR/GTO, simple physical-empirical model	Basic	2B	NEWLY REVISED
Triac, simple physical-empirical model	Basic	1B	Still conceptual, not yet implemented
Diac, simple physical-empirical model	Basic	2B	YES
SCR with dynamic charge storage effects.	Accurate	1A	Commercial model also available in Saber
GTO with dynamic charge storage effects.	Accurate	1A	Commercial model also available in Saber

Key to Model Performance Ratings

Basic	Simple equation set with easy parameter extraction and fast simulation time. A maximum of one system variable is allowed in a model to keep simulation time fast.
Intermediate	Basic model with some additional features to increase accuracy.
Accurate	High accuracy, but with slower simulation time and more difficult parameter extraction.
Thermal	An Accurate model with additional capability to generate dynamic device temperature and thermal characteristics from internal power dissipation and heat sink characteristics

Key to Model Quality Classifications

1	Model developed as student project without much testing or debugging. .
2	Model debugged and matched against extensive experimental data
3	Some productization has been completed to make the model robust.

A	Parameter extraction procedures are NOT available
B	Parameter extraction procedures ARE available

Table of Available Models and Their Characteristics

Recent survey article on compact models for power devices.