Asynchronous design has been an active area of research since at least the
mid 1950's, but has yet to achieve widespread use. In
"Asynchronous Design Methodologies: An Overview"
we examine the benefits and problems inherent in asynchronous computations,
and in some of the more notable design methodologies.
These include Huffman asynchronous circuits, burst-mode circuits,
Micropipelines, template-based and Trace Theory-based delay-insensitive
circuits, Signal Transition Graphs, Change Diagrams, and compilation-based
quasi-delay-insensitive circuits.
This paper is meant to be readable by someone with some experience with logic
design, but not necessarily any exposure to asynchronous circuits. It may
also serve as a good overview of the field for someone with a strong knowledge
of specific asynchronous methodology(ies).
Also relevant to asynchronous circuits is Montage, the first FPGA for
asynchronous circuits.
The paper
"An FPGA For Implementing Asynchronous Circuits",
gives a good overview of the architecture and software tools, though the hypertext page
Triptych/Montage FPGA Architectures
will give a quick taste.
Journal Articles
S. Hauck, S. Burns, G. Borriello, C. Ebeling,
"An FPGA For Implementing Asynchronous Circuits" (PDF),
IEEE Design & Test of Computers,
Vol. 11, No. 3, pp. 60-69, Fall, 1994.
S. Hauck,
"Asynchronous Design Methodologies: An Overview" (PDF),
Proceedings of the IEEE, Vol. 83, No. 1, pp. 69-93, January, 1995.
Also appearing as
University of Washington, Dept. of C.S.&E. TR #93-05-07, 1993.
Patents, Theses, and Book Chapters
S. Hauck, G. Borriello, S. Burns, C. Ebeling,
"Field-Programmable Gate Array for Synchronous and Asynchronous Operation",
U.S. Patent 5,367,209, issued November 22, 1994.
J. A. Brzozowski, S. Hauck, C.-J. H. Seger,
"Chapter 15: Design of Asynchronous Circuits",
in J. A. Brzozowski, C.-J. H. Seger,
Asynchronous Networks,
Springer-Verlag, 1995.
Workshop Papers
S. Hauck, G. Borriello, S. Burns and C. Ebeling,
"Montage: An FPGA for Synchronous and Asynchronous Circuits" (PDF),
2nd International Workshop on Field-Programmable Logic and Applications,
Vienna, August 1992.
Also appearing in H. Grunbacher, R. W. Hartenstein, Eds., Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping,
Berlin: Springer-Verlag, pp. 44-51, 1993.
For access to the rest of my work please see my
homepage.