UWEE Tech Report Series

SILCA --- SPICE-Accurate Iterative Linear-Centric Analysis for Efficient Time-Domain Simulation of VLSI Circuits with Strong Parasitic Couplings


UWEETR-2003-0006

Author(s):
Zhao Li and C.-J. Richard Shi

Keywords:
Time-domain (Transient) Circuit Simulation, Strong Parasitic Coupling Effects, Fixed Leading Coefficient Numerical Integration Scheme, Successive Variable Chord Method

Abstract

A new circuit analysis method, namely SPICE-accurate Iterative Linear-Centric Analysis (SILCA), is proposed for efficient and accurate time-domain simulation of deep-submicron VLSI circuits with strong parasitic couplings introduced by interconnect wires, common substrate, power/ground networks, etc. SILCA consists of several linear-centric techniques applied to classical time-domain nonlinear circuit simulation, and can be easily implemented to any SPICE-like simulator. For time-domain numerical integration, explicit-formula substitution and iterative-formula transformation are presented to convert implicit variable time-step integration to fixed leading coefficient time-step integration, so that equivalent conductance in companion models of charge storage devices is kept constant for time- domain simulation. We characterize both the convergence and stability properties of the resulting fixed leading coefficient integration formulae and describe techniques for adaptive step-size control. For nonlinear iteration, a successive variable chord method is introduced as an alternative to the Newton-Raphson method to achieve constant linearized conductance for nonlinear devices during nonlinear iteration. Furthermore, the low-rank update technique is implemented for fast LU factorization. With these techniques, the number and cost of required LU factorizations is reduced dramatically with SILCA. Experimental results on circuits coupled with substrate and power/ground networks have demonstrated that SILCA achieves SPICE-like accuracy. Further, more than an order of magnitude speedup over SPICE3 in terms of both the cost of LU factorization and overall CPU time has been observed for circuits with tens of thousands devices, and the efficiency increases further with the size of a circuit. SILCA is suitable for the accurate time- domain simulation of parasitic-sensitive very large-scale integrated circuits, where the number of linear parasitic devices dominates the number of nonlinear devices.

Download the PDF version

Download the Gzipped Postscript version