JCATI: An Optical Tranceiver using 65nm process with CMOS Technology
Sponsor: State of Washington
PIs: Richard Shi
Period: Feb 08, 2013 to Jun 30, 2013
Objectives: The purpose of this project is to enable use of low cost and light weight plastic fiber based optical communications in airplane avionics communications backplanes. This is part of the Joint Center for Aerospace Technology Innovation.

CASCADE: A 40Gbps Low-Density Parity-Check Decoder ASIC in 3-Dimensional Integrated Circuit Technology
Sponsor: DARPA and SPAWAR
PIs: Richard Shi
Period: Spe 30, 2005 to Sep 29, 2009
Collaborators: MIT Lincon Lab
Objectives: To design, implement and test a 40Gbps LDPC communication decoder using emering three-dimensional (multiple layers of transistors) technologies. The research focuses are on the development of structured 3D design methodologies, design flow and CAD tools to enable 3D ASIC design and the demonstration of the potential of fine-grained 3D device interconnect technologies in extending Moore's Law.

CoSMoS: Coupled Modeling and Simulation of Systems-on-Chips
Sponsor: DARPA
PIs: Richard Shi, Vikram Jandhyala, David Allstot
Subcontractors: Lawrence Livermore National Lab., Boeing
Period: July 1, 2001 to June 30, 2004
Industry Collaborators: Motorola, Intel
Objectives: a coupled hierarchical modeling and fast simulation capacities for systems-on-chip signoff simulation with the emphasis on predicting substrate coupling and full-wave power-ground noises Target Applications: multiple transceivers on chips

NSF CAREER: Behavioral Modeling and Simulation
Sponsor: NSF
PIs: Richard Shi
Period: July 1, 2001 to June 30, 2004
Objectives: Methods and algorithms for automatic behavioral modeling and simulation

Symbolic Circuit Analysis and Modeling of Analog/RF Circuits
Sponsor: DARPA
PIs: Richard Shi
Period: July 1, 2001 to June 30, 2004
Industry Collaborators: Motorola, Intel
Objectives: Symbolic analysis of analog/RF circuits Target Applications: analog/RF circuit block modeling

Application of Communication Theory to Nano Interconnect Modeling
Sponsor: NSF/SRC
PIs: Richard Shi, Sumit Roy and David Allstot
Period: July 1, 2001 to June 30, 2004
Objectives: To develop models, based on communication principles for interconnects on a noise environment, and to apply developed models to on-chip signaling.

Modeling for SoC Integration
Sponsor: NSF
PIs: Richard Shi (PI, David Allstot)
Period: July 1, 2001 to June 30, 2004
Objectives: Create behavioral models for analog/RF blocks

Fast Methods for Coupled Circuit/EM/Digital Simulation
Sponsor: NSF/SRC
PIs: Richard Shi and Vikram Jandhyala
Period: July 1, 2001 to June 30, 2004
Objectives: Methods and algorithms for fast simulation of coupled EM, circuit-level and logic-level model