As electronics continue to penetrate every facet of contemporary life, the analog/RF integrated circuit (IC) market is experiencing unprecedented growth, with its current annual value standing at over $45B. With application domains mainly in wireless communications, real-time control, remote sensing, automotive and health, ensuring reliability and trustworthiness of analog/RF integrated circuits becomes paramount. This seminar elucidates the role that machine learning and statistical analysis can play towards this end. Specifically, we will discuss (i) a classification-based test method for testing whether the performances of a fabricated analog/RF IC meet its specifications, (ii) a regression-based calibration method for tuning the performances of each fabricated device through the use of on-chip knobs in order to increase yield, (iii) a statistical side-channel fingerprinting method for detecting malicious circuit inclusions (a.k.a. hardware Trojans) in wireless cryptographic ICs, and (iv) the design of on-chip analog neural networks for enabling post-deployment built-in self-test, self-repair and self-trust evaluation. Results will be provided using industrial test data and measurements from custom-designed analog/RF ICs.
Yiorgos received the Diploma of Computer Engineering and Informatics from the University of Patras, Greece, in 1995 and the M.S. and Ph.D. degrees in Computer Engineering from the University of California, San Diego, in 1998 and 2001, respectively. After spending a decade on the faculty of Yale University, he joined UT Dallas where he is now a Professor of Electrical Engineering, leading the Trusted and RELiable Architectures (TRELA) Research Laboratory. His research focuses on applications of machine learning and statistical analysis in the development of trusted and reliable integrated circuits and systems, with particular emphasis in the analog/RF domain. He is the 2016 general chair and was the 2013-2014 program chair of the IEEE VLSI Test Symposium as well as the 2010-2012 program chair of the Test Technology Educational Program (TTEP). He is as an associate editor of the IEEE Design & Test periodical and the Springer Journal of Electronic Testing: Theory and Applications and has also served as a guest editor for the IEEE Transactions on Computers and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and as a topic coordinator and/or program committee member for several IEEE and ACM conferences. He is a Senior Member of the IEEE, a recipient of the 2006 Sheffield Distinguished Teaching Award and a recipient of the Best Paper Award from the 2013 Design Automation and Test in Europe (DATE’13) conference. His research activities have been supported by NSF, ARO, SRC, DARPA, Boeing, IBM, LSI, Intel, and Texas Instruments.